· Micron FQ3 2026 earnings call, recirculated on X · positive
Posts circulating today quote Sanjay Mehrotra saying Micron has no line of sight on when memory supply catches demand, with only gradual improvement expected from 2028. The quote is from the late-June FQ3 call rather than new news, but it is the clearest statement of the constraint our model already assumes.
A Mehrotra quote is being recirculated today as breaking news: "Even as we expect industry supply to improve gradually in 2028, we currently do not have line of sight as to when memory supply will be able to catch up with increasing demand." It is not new. He said it on the fiscal Q3 2026 earnings call in late June, alongside the point that tight conditions should persist beyond calendar 2027, on AI-driven HBM and DRAM demand against structural limits on adding capacity: greenfield fab lead times, advanced-node complexity, labour and power. The comment has held up in subsequent interviews, which is why it keeps resurfacing, but the date matters for anyone treating it as a fresh catalyst.
What it does is put management's own words behind the shape our model already carries. Cloud Memory is modelled on capacity rather than growth precisely because supply, not demand, is the binding constraint: 2,400 PB in the basis quarter with roughly 190 PB a quarter of new supply arriving on the HBM4 ramp and the fabs now under construction. "No line of sight" is the same statement in plainer language. It also sits behind the take-or-pay agreements disclosed in the 2026 Q3 10-Q, where customers accepted a floor price for the term and prepaid about $18B in cash to secure allocation. Customers do not prepay for supply they expect to become abundant.
The boundary is 2028. Mehrotra's own framing is gradual improvement starting then, and the model agrees: revenue peaks in fiscal 2028 and declines afterwards as the capacity being built now lands. That is the disciplined reading. The floor prices are well above any prior cycle's peak margins, so the downside is cushioned, but the ceiling is real and the glide down is deliberate rather than pessimistic.
Read beside Nvidia's reported 15% rack-price increase, the two form one picture from opposite ends. The supplier says it cannot see when it catches up; the largest customer of that supply is passing the cost to the hyperscalers. Neither is a reason to move the base case on its own, but together they say the tightness is being priced through the stack rather than absorbed inside it.
· Bloomberg via StockMKTNewz · positive
Nvidia reportedly told major customers that AI-server prices will rise more than 15% as memory costs surge. That points opposite to the 1% quarterly rack-price decline in our Nvidia model, though it is not yet clear whether this is a margin-neutral cost passthrough.
Nvidia reportedly told major customers that AI-server prices will rise more than 15% for systems shipping early next year, including Vera Rubin and Grace Blackwell configurations. Trade reports attribute the increase to sharply higher server-memory costs, with HBM4 and high-capacity LPDDR5X making memory a much larger share of a rack's bill of materials. The exact figures vary widely across secondary sources, so the durable observation is the direction: a cost line that had been expected to fall is rising enough to reach customer pricing.
That directly contradicts an input in our Nvidia model. The data-center compute vertical uses an NVL72-class rack price of $3.0 million and assumes that price declines 1% every quarter because performance per dollar improves and custom ASIC competition accelerates the trend. A one-off 15% step to $3.45 million, with the old decline still in place, adds about $26 per share to the modelled base value. Holding price flat instead of cutting it 1% a quarter adds about $32. Applying both changes adds roughly $63 per share. The continuing drift matters more than the first price increase.
The crucial ambiguity is margin. If Nvidia passes Micron and other suppliers' higher memory costs through at roughly zero incremental margin, Nvidia's revenue per rack rises while unit economics are protected rather than improved. For memory suppliers, however, the passthrough is direct evidence that the price cycle is strong enough to change the cost of an entire AI system. It also shows that customers have not yet responded by cutting HBM content or accelerator orders.
The model should retain the pricing sensitivity but wait for direct Nvidia commentary before changing its base case. For Micron, the more immediate conclusion is that extraordinary memory pricing is no longer confined to supplier filings: it is visible in the invoices paid by the next layer of the AI stack.
Apple has reportedly tested CXMT memory for China-market devices, but political approval and tight allocation remain obstacles. CXMT being sold out while earning a 48.7% March-quarter net margin weakens the near-term thesis that Chinese supply is already dumping memory and ending the cycle.
Apple has reportedly tested CXMT memory for iPhones and MacBooks intended for China as the AI buildout tightens component supply. The effort is politically difficult: Apple has sought US government clearance, while a bipartisan group of senators asked the company to rule out Chinese memory entirely. The practical obstacle may be just as important. CXMT's 2026 production is reportedly heavily committed, with domestic customers including ByteDance, Tencent and Xiaomi receiving priority. Apple may be willing to qualify a politically radioactive supplier and still find little incremental capacity available.
That matters for the memory-cycle debate. The common bear case says Chinese entrants eventually flood the market with low-priced bits, break incumbent discipline and end the shortage. CXMT's recent economics and allocation behaviour point in the opposite direction for now. Its March-quarter net margin was approximately 48.7%, up sharply from 2025, and reports describe the company as sold out rather than discounting excess output. A supplier earning scarcity margins and rationing capacity to domestic customers is participating in the cycle, not yet ending it. Apple's search for a second source is demand-side evidence that the shortage is real enough to outweigh substantial political and supply-chain risk.
The conclusion should stay time-bound. Testing does not mean Apple has secured meaningful volume, and reports differ between an outright lack of supply and CXMT refusing Apple's requested pricing. Chinese capacity can still become the source of a future glut as new fabs arrive. What the current evidence weakens is the claim that this glut is already here. Right now CXMT appears capacity-constrained, profitable and domestically prioritised—the opposite conditions from a dumping-led cycle break.
· Bloomberg via LiveSquawk · negative
SK hynix and Samsung are reportedly preparing more than $200B of shareholder returns while memory makers approve record fab spending. When rising prices fund both distributions and capacity, capital discipline may no longer constrain the next supply cycle.
SK hynix may add at least $130 billion of shareholder returns through 2027, according to a JPMorgan note reported by Bloomberg, while Samsung is separately reported to be planning roughly $72–80 billion. The important detail is the policy change: SK hynix is said to have lifted its commitment from up to half of cumulative 2025–2027 free cash flow to more than half. These figures remain estimates and press reports rather than completed distributions, but they describe an industry generating extraordinary cash.
The same boards are also approving extraordinary capacity. SK hynix authorised about ₩54.3 trillion of new fabs shortly before a ₩40 trillion buyback, with first-half capex up 73% and new production expected around 2028. Micron has outlined more than $250 billion of US investment through 2035, including a $50 billion Boise buildout whose second fab is scheduled for late 2028. That date matches the supply year in our Micron bear case. The cycle is currently profitable enough to fund both record distributions and record construction rather than forcing a choice between them.
That is what makes the news a warning rather than a celebration. Memory prices and Korean semiconductor exports are still rising sharply, so capacity decisions are being financed at the strongest point in the cycle and will arrive years later. Past cycles broke when high returns removed the constraint on new supply. The honest counterargument is that returning more than half of free cash flow leaves less cash for fabs and may itself demonstrate discipline. The decisive check is therefore whether capex rises alongside the payout policy. Current SK hynix guidance suggests it does.
The headline numbers need care. JPMorgan's $130 billion may describe capacity to return cash rather than a formal plan, Samsung is not tracked in our data, and per-kilogram trade prices are distorted by product mix. The durable signal is the combination: cash returns are expanding, fab commitments are expanding, and the new supply has a 2028 delivery schedule. Discipline has not necessarily broken, but it is no longer imposed by a shortage of capital.
TrendSpider says Micron's NAND revenue is growing faster than DRAM. Sandisk's 372% growth versus Micron DRAM's 343% supports the ordering, but Micron's filing-level product split is needed before treating it as fact.
TrendSpider posted that Micron's NAND revenue is rising faster than DRAM, although the underlying chart was not visible in the scouting workflow and the post also marketed the vendor's new fundamentals product. The claim therefore starts with weak provenance. Yet it points to a real modelling question because Micron's filing says DRAM sales increased 343%, driven mostly by a low-260% increase in average selling prices and only a low-20% increase in bit shipments.
A separate filing-based comparison makes the ordering plausible. Pure-play NAND producer Sandisk reported quarterly revenue up 372% year over year, above Micron's disclosed DRAM growth, with an 84.6% gross margin and another sequential increase guided. That does not prove Micron's own NAND line grew faster than its DRAM line, but it shows that NAND can be moving at least as quickly across the industry. The distinction matters because a price-led DRAM rebound and a bit-growth-led NAND rebound have different durability and capacity implications.
Our Micron model cannot express that difference cleanly. It is organised by end markets—Cloud Memory, Core Data Center, Mobile and Client, Automotive and Embedded—while NAND appears as streams inside several verticals. There is no product axis that can be moved independently. If NAND is the fastest-growing technology in the mix, its economics are spread across drivers calibrated largely to the DRAM cycle, and the model can be wrong without making the source of the error visible.
The filing check is straightforward: reconstruct Micron's DRAM and NAND revenue for at least four quarters, compare year-over-year and sequential growth, and separate price from bit shipments. It also matters whether take-or-pay protections cover NAND or mainly DRAM and HBM. Until that work is done, the useful finding is not that NAND definitely leads. It is that a potentially leading product line is missing as a controllable dimension in the model.
· PolymarketMoney and UBS commentary via X · negative
Cathie Wood reportedly avoids memory stocks because inference chips may engineer out HBM, while UBS argues token economics are becoming more memory-driven. The dispute turns on HBM bits per accelerator—not accelerator demand alone.
A reported Cathie Wood comment says inference chips are beginning to engineer out high-bandwidth memory, while UBS argued in the same week that AI token economics are becoming increasingly driven by memory rather than compute. These are opposing claims about the same variable. If inference hardware shifts toward larger on-package caches, more SRAM or lower-precision formats, bandwidth required per token could fall even while accelerator shipments keep rising. The memory shortage could then ease without a single new fab.
The stress test for Micron is HBM content per accelerator, not accelerator unit growth. Our four cases largely assume a bandwidth-hungry world, and the bear arguments are mostly about future supply. An attach-rate shock attacks demand instead. The near-term protection is contractual: Micron has described take-or-pay agreements with floor prices, binding volumes and $22 billion of customer commitments, including about $18 billion of cash deposits. An architectural change inside those terms may hit uncontracted demand first, producing a re-rating before it produces a revenue decline.
The counterargument is that model weights still need to reside somewhere and that cheaper bandwidth per token can stimulate enough additional inference to increase total bits consumed. Shipping systems such as wafer-scale processors can reduce dependence on HBM for some workloads, but one architecture is not an industry trend. The evidence needed is concrete: HBM stack counts and capacity across accelerator generations, examples of deployed inference chips that reduce external-memory content, and token-level benchmarks that separate bandwidth constraints from compute constraints. Until those exist, “engineer out HBM” is a useful failure condition for the thesis, not an established collapse in demand.